Microprocessors sometimes need to access an external memory for data, which may be slow compared to accessing a local memory. As a result, some systems have a local cache memory for storing recently used data. However, current cache memory schemes have a variety of drawbacks, particularly with respect to error detection and correction. Therefore, it would be desirable to create a more efficient error detection and correction scheme with respect to memory and one that does not require significant changes to memory interface bus architecture.